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A new ATLAS pixel front-end IC for upgraded LHC luminosity

Fast facts

  • Internal authorship

    Prof. Dr. Michael Karagounis

  • Further publishers

    M. Barbero, D. Arutinov, R. Beccherle, G. Darbo, R. Ely, D. Fougeron, M. Garcia-Sciveres, D. Gnani, T. Hemperek, R. Kluit, V. Kostioukhine, A. Mekkaoui, M. Menouni, J.-D. Schipper

  • Publishment

    • 2009

  • Journal

    Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment (1-2)

  • Organizational unit

    Electrical engineering

  • Subjects

    • General electrical engineering

  • Publication format

    Journal article (Article)

Content

A new pixel Front-End (FE) IC is being developed in a 130nm technology for use in the upgraded ATLAS pixel detector. The new pixel FE will be made of smaller pixels (50×250μm vs. 50×400μm for the present FE, FE-I3), a much improved active area over inactive area ratio, and a new analog pixel chain tuned for low power and new detector input capacitance. The higher luminosity for which this IC is tuned implies a complete redefinition of the digital architecture logic, which will not be based on End-of-Column data buffering but on local pixel logic and local pixel data storage. An overview of the new FE is given with particular emphasis on the new digital logic architecture and possible architecture variations.

Keywords

Digital architecture

FE-14

Pixel

Super-LHC

Notes and references

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